MODULE div455
title 'frequency divider'

" Inputs
	CLK		pin	1;

" Internal

	S8..S0		node istype 'reg';


" Outputs
	DP		pin	23 istype 'reg';

" Constants
        H,L,X,C,Z = 1,0, .X., .C., .Z.;
        Counter = [S8..S0];


EQUATIONS

	DP := S8;

	Counter.clk = CLK;

	when (Counter == 511) then Counter := 57
	else                       Counter := Counter+1;
	

END